• DocumentCode
    1854234
  • Title

    Adaptive biasing circuit overcoming process variation for high-speed circuits in scaled CMOS technology

  • Author

    Chen, Luis ; Yue, C. Patrick

  • Author_Institution
    Dept. of ECE, Univ. of California, Santa Barbara, CA
  • fYear
    2008
  • fDate
    23-25 April 2008
  • Firstpage
    243
  • Lastpage
    246
  • Abstract
    A self-biased, VTH tracking current reference circuit is designed in 90 nm CMOS process. A finite state machine automatically adjusts the reference current to achieve plusmn5% deviation across process variation. The bias circuit is used on a differential test circuit and simulation shows a maximum of 8.53% variation in bias current.
  • Keywords
    CMOS integrated circuits; finite state machines; reference circuits; CMOS process; adaptive biasing circuit; bias circuit; differential test circuit; finite state machine; high-speed circuits; process variation; reference current; scaled CMOS technology; self-biased tracking current reference circuit; Automata; CMOS process; CMOS technology; Circuit testing; Circuit topology; Equations; Frequency; MOSFETs; Silicon; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on
  • Conference_Location
    Hsinchu
  • Print_ISBN
    978-1-4244-1616-5
  • Electronic_ISBN
    978-1-4244-1617-2
  • Type

    conf

  • DOI
    10.1109/VDAT.2008.4542458
  • Filename
    4542458
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1854234