CMOS low-noise amplifier with shunt-peaking load for group 1∼3 MB-OFDM ultra-wideband wireless receiver

Author

Huang, Zhe Yang ; Huang, Che Cheng ; Chen, Chun Chieh ; Hung, Chung Chih ; Jou, Christina F.

Author_Institution

Inst. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu

fYear

2008

fDate

23-25 April 2008

Firstpage

251

Lastpage

254

Abstract

In this paper, a CMOS low-noise amplifier (LNA) is designed for ultra-wideband (UWB) wireless receiver system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaking load and an output buffer for measurement purpose. It was fabricated in UMC 0.18 mum standard RF CMOS process. The LNA provides 14.1 dB maximum power gain between 2.3G Hz-8.0 GH while consuming 18.6 mW (including buffer) through a 1.8 V supply. Over the 3.1 GHz-8.0 GHz frequency band, a minimum noise figure is 2.0 dB. The input return loss is lower than -7.1 dB in the entire bandwidth has also been achieved.

Keywords

CMOS integrated circuits; frequency division multiplexing; impedance matching; low noise amplifiers; radio receivers; ultra wideband communication; CMOS low-noise amplifier; OFDM ultrawideband wireless receiver; UMC RF CMOS process; UWB wireless receiver system; cascode amplifiers; power 18.6 mW; shunt-peaking load; size 0.18 mum; voltage 1.8 V; wideband input impedance matching network; Broadband amplifiers; CMOS process; Gain; Impedance matching; Impedance measurement; Low-noise amplifiers; Noise figure; Radio frequency; Radiofrequency amplifiers; Ultra wideband technology; LNA; Low-Noise Amplifier and Shunt-Peaking; RFIC; UWB; Ultra-Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on

Conference_Location

Hsinchu

Print_ISBN

978-1-4244-1616-5

Electronic_ISBN

978-1-4244-1617-2

Type

conf

DOI

10.1109/VDAT.2008.4542460

Filename

4542460