DocumentCode
1854599
Title
A design methodology for low EMI-noise microprocessor with accurate estimation-reduction-verification
Author
Tsujikawa, Hiroyulu ; Shimazaki, Kenji ; Hirano, Shozo ; Ohki, Motohiro ; Yoneda, Talcashi ; Benno, Hiroshi
Author_Institution
Matsushita Electr. Ind. Co. Ltd., Kyoto, Japan
fYear
2002
fDate
2002
Firstpage
299
Lastpage
302
Abstract
The main objective of our work is to develop a fast and accurate total solution for dramatically reducing electromagnetic interference (EMI) noise in high-performance LSI microchips at the design stage through unifying estimation, reduction, and verification. This innovative methodology has been proven in the successful design of a 32-bit microprocessor with very low EMI noise.
Keywords
electromagnetic interference; integrated circuit design; integrated circuit noise; large scale integration; microprocessor chips; 32 bit; accurate estimation-reduction-verification; design methodology; electromagnetic interference; high-performance LSI microchips; low EMI-noise microprocessor; Circuit noise; Design methodology; Electromagnetic interference; Frequency; Large scale integration; Microelectronics; Microprocessors; Noise reduction; Power supplies; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002
Print_ISBN
0-7803-7250-6
Type
conf
DOI
10.1109/CICC.2002.1012822
Filename
1012822
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