• DocumentCode
    1854616
  • Title

    Design integration, DFT, and verification methodology for an MPEG 1/2 audio layer 3 (MP3) SoC device

  • Author

    Birkl, Bernhard ; Hooser, Bridget ; Janssens, Marc ; Lenke, Frank ; Vorisek, Vlado

  • Author_Institution
    Semicond. Products Sector, Motorola, Munich, Germany
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    303
  • Lastpage
    306
  • Abstract
    This paper describes the SoC design and integration methodology of a MPEG1/2 Audio Layer 3 (MP3) decoder chip. Due to a very tight development cycle we decided to use state of the art methodology for integration, verification, and design for test (DFT) in order to minimize risk and problem areas. The combination of a top-down integration flow, strong focus on constraint driven timing analysis, a modular simulation environment, and leading edge DFT solutions led to an implementation cycle of only 8 weeks. The chip is realized in an 0.18 μm technology using 5 layers of metal, achieving a final die size of 16 mm2. The central processor runs at a minimal speed of 140 MHz
  • Keywords
    audio equipment; circuit simulation; consumer electronics; decoding; design for testability; integrated circuit design; integrated circuit interconnections; integrated circuit metallisation; integrated circuit modelling; integrated circuit testing; reduced instruction set computing; timing; 0.18 micron; 140 MHz; 8 week; DFT; MP3 SoC device; MP3 decoder chip; MPEG 1/2 Audio Layer 3 SoC device; RISC processor core; SoC design; central processor speed; constraint driven timing analysis; design integration; design verification methodology; development cycle; die size; implementation cycle; metal layers; modular simulation environment; risk minimization; top-down integration flow; Automatic generation control; Business; Decoding; Delay; Design for testability; Digital audio players; Reduced instruction set computing; Silicon; System testing; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    0-7803-7250-6
  • Type

    conf

  • DOI
    10.1109/CICC.2002.1012823
  • Filename
    1012823