Title :
The results of the VLSI implementation of high performance switched-capacitor analog building blocks
Author_Institution :
Dept. of Electr. & Comput. Eng., Naval Postgraduate Sch., Monterey, CA, USA
Abstract :
The results of a VLSI implementation of CMOS custom integrated circuit featuring high performance programmable switched capacitor analog building blocks is presented. The networks realized are based on the composite op amps, previously introduced and known for their extended bandwidth and reduced active and passive sensitivities. For proof of concept, a CMOS chip was designed and manufactured featuring two different SC composite op amps, and based on a stray insensitive design. Experimental results of the 40 pin prototype chips verified the design concept that was demonstrated theoretically and using SPICE simulation. The results clearly demonstrate the enhanced characteristics of these family of composite op amps when utilized in different applications
Keywords :
CMOS analogue integrated circuits; VLSI; operational amplifiers; switched capacitor networks; 40 pin prototype chips; CMOS custom integrated circuit; SPICE simulation; VLSI implementation; composite op amps; programmable SC building blocks; stray insensitive design; switched-capacitor analog building blocks; Application specific integrated circuits; Bandwidth; CMOS analog integrated circuits; Manufacturing; Operational amplifiers; SPICE; Switched capacitor circuits; Switching circuits; Very large scale integration; Virtual prototyping;
Conference_Titel :
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-7803-2972-4
DOI :
10.1109/MWSCAS.1995.504408
