Title :
An AI-calibrated IF filter: a yield enhancement method with area and power dissipation reductions
Author :
Murakawa, Masahiro ; Adachi, Toru ; Nino, Y. ; Takahashi, Eiichi ; Kasai, Yuji ; Takasuka, K. ; Higuchi, Tetsuya
Abstract :
We have developed an LSI for Gm-C IF filters, attaining (1) a 63% reduction in filter area, (2) a 38% reduction in power dissipation, compared to existing commercial products, and (3) a yield rate of 97%. The developed chip is calibrated within a few seconds by a genetic algorithm; an efficient AI technique for difficult optimization problems
Keywords :
analogue integrated circuits; calibration; circuit optimisation; filters; genetic algorithms; integrated circuit testing; integrated circuit yield; large scale integration; AI technique; AI-calibrated IF filter; Gm-C IF filters; LSI; area dissipation reduction; filter area reduction; genetic algorithm; optimization; power dissipation reduction; yield enhancement method; yield rate; Artificial intelligence; CMOS technology; Calibration; Circuit testing; Energy consumption; Filters; Genetics; Integrated circuit yield; Large scale integration; Power dissipation;
Conference_Titel :
Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-7250-6
DOI :
10.1109/CICC.2002.1012837
