DocumentCode
1855075
Title
A low-power W-CDMA demodulator using specially-designed micro-DSPs
Author
Igura, Hiroyuki ; Hirata, Masaru ; Yamada, Junya ; Yamashina, Masakazu ; Ono, Shigeru
Author_Institution
NEC Corp., Kanagawa, Japan
fYear
2002
fDate
2002
Firstpage
397
Lastpage
400
Abstract
This paper presents the architecture of a demodulator developed for W-CDMA digital baseband processing. The demodulator features micro-DSPs specially designed for it and a variety of power-lowering and area-saving techniques such as detailed clock control, reduction of unnecessary signal transition and data compression. These features give the demodulator much lower power consumption and smaller size than a conventional one.
Keywords
3G mobile communication; code division multiple access; data compression; demodulators; digital signal processing chips; low-power electronics; W-CDMA demodulator; area-saving techniques; data compression; digital baseband processing; low-power electronics; micro-DSPs; power-lowering techniques; signal transition; Baseband; Demodulation; Energy consumption; Frequency; Large scale integration; Mobile handsets; Multiaccess communication; Radio communication; Signal processing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002
Print_ISBN
0-7803-7250-6
Type
conf
DOI
10.1109/CICC.2002.1012855
Filename
1012855
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