Title :
On fault modeling and fault tolerance of antifuse based FPGAs
Author_Institution :
Texas Instruments Incorporated
Keywords :
Circuit faults; Fault tolerance; Field programmable gate arrays; Logic arrays; Logic programming; Logic testing; Programmable logic arrays; Redundancy; Routing; Semiconductor process modeling;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
IEEE
Print_ISBN :
0-7803-1281-3
