Time warping-waveform relaxation in a distributed circuit simulation environment

Author

Soto, Carlos Pon ; Saleh, Resve ; Kwasniewski, Tad

Author_Institution

Dept. de Ingenieria de Sistemas y Comput., Univ. Catolica del Norte, Antofagasta, Chile

Volume

1

fYear

1995

fDate

13-16 Aug 1995

Firstpage

338

Abstract

A time warping algorithm is included in the waveform relaxation circuit simulation in a distributed environment in a multicomputer network. The algorithm feature, is that it can exploit parallelism in the spatial, iteration and temporal domains. The algorithm is characterized by a relative insensitivity to the interprocessor communication overhead. The simulator is ported on a network of Sun Sparc-2 workstations using a 10 Mbits/sec. communication link. Speedups results obtained are comparable for a shared memory architecture

Keywords

VLSI; circuit analysis computing; integrated circuit design; iterative methods; multiprocessing systems; parallel algorithms; time warp simulation; 10 Mbit/s; Sun Sparc-2 workstations; VLSI; distributed circuit simulation environment; interprocessor communication overhead; iteration domain; multicomputer network; parallelism; spatial domain; speedup results; temporal domain; time warping-waveform relaxation; Circuit simulation; Computational modeling; Concurrent computing; Delta modulation; Distributed algorithms; Hardware; Memory architecture; Partitioning algorithms; Relaxation methods; Sun; Very large scale integration; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on

Conference_Location

Rio de Janeiro

Print_ISBN

0-7803-2972-4

Type

conf

DOI

10.1109/MWSCAS.1995.504446

Filename

504446