Title :
Reliability modeling of nanoelectronic circuits
Author :
Han, Jie ; Taylor, Erin ; Gao, Jianbo ; Fortes, José
Author_Institution :
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
Abstract :
Reliability and its modeling have become critical issues for nanotechnology-based circuits. This paper considers the use of probabilistic models of unreliable logic gates to estimate the reliability of nanoelectronic circuits and derive fundamental error bounds for logic gates. Two methods are experimentally contrasted with respect to accuracy and computational complexity.
Keywords :
fault tolerance; logic gates; nanoelectronics; probability; reliability; fault-tolerance; logic gates; nanoelectronic circuits; nanotechnology-based circuits; reliability modeling; Circuit faults; Electrons; Electrostatics; Integrated circuit interconnections; Logic circuits; Logic devices; Logic gates; Nanoscale devices; Quantum cellular automata; Quantum dots;
Conference_Titel :
Nanotechnology, 2005. 5th IEEE Conference on
Print_ISBN :
0-7803-9199-3
DOI :
10.1109/NANO.2005.1500703
