Title :
The construction of a fault tolerant reversible gate for quantum computation
Author :
Vasudevan, D.P. ; Lala, P.K. ; Parkerson, J.P.
Author_Institution :
Dept. of Comput. Sci. & Comput. Eng., Arkansas Univ., Fayetteville, AR, USA
Abstract :
Fault tolerance plays a major role in quantum computer design. As the quantum environment is not stable enough when the information is read from it, better design techniques with error correcting capability are needed to overcome the information loss due to decoherence in quantum circuits. This paper presents a fault tolerant reversible gate that can be used in quantum computing systems.
Keywords :
design; fault tolerance; quantum computing; quantum gates; design techniques; fault tolerant reversible gate construction; quantum circuits; quantum computation; quantum computer design; quantum computer model; quantum computing systems; Computer errors; Computer science; Design engineering; Error correction; Error correction codes; Fault tolerance; Logic circuits; Logic gates; Physics computing; Quantum computing;
Conference_Titel :
Nanotechnology, 2005. 5th IEEE Conference on
Print_ISBN :
0-7803-9199-3
DOI :
10.1109/NANO.2005.1500705
