Design methodology for single electron based building blocks

This paper investigates the design process of Single Electron Tunneling (SET) based building blocks in which logic values arc represented by single or few electrons. A design methodology is proposed that, given a circuit topology and the corresponding targeted behavior, assists the circuit designer in deriving the circuit parameters in an analytical way. The methodology, based on the mathematical description of the tunnel junctions in the circuit, allows for a time effective design of SET based building blocks. Moreover the method allows for the adaptation of such blocks for the utilization in larger SET circuits. During the presentation we use a Move k electron (MVke) block as a discussion vehicle but the approach we propose is general and can be utilized for any SET topology.