• DocumentCode
    1856836
  • Title

    Optimization of thermal vias for thermal resistance in FR-4 PCBs

  • Author

    Beng, Alex Lee Yuen ; Gan Sik Hong ; Devarajan, Mutharasu

  • Author_Institution
    Nano Optoelectron. Res. Lab., Univ. Sains Malaysia, Minden, Malaysia
  • fYear
    2013
  • fDate
    26-28 Aug. 2013
  • Firstpage
    345
  • Lastpage
    349
  • Abstract
    A detailed thermal simulation of the performance of FR-4 PCBs having various "via configuration" is made in this study. The results indicate the thermal resistance from the simulation is significantly affected by compact thermal via configurations. Thermal resistance can be improved by increasing via number and also with copper filled via. For further explanation of the significant drop of thermal resistance at PCBs with thermal via, the detailed thermal resistance distribution at the thermal module are further examined. The significant drop in thermal resistance mainly occur in FR-4 PCBs with the help of thermal via. However, there is observed a maximum number of via which contribute to optimized thermal resistance across the PCB.
  • Keywords
    printed circuit design; thermal resistance; FR-4 PCB; copper filled via; thermal module; thermal resistance distribution; thermal simulation; thermal via configurations; Copper; Mathematical model; Resistance heating; Thermal conductivity; Thermal resistance; copper filled thermal via. thermal vias; plated through hole (PTH); thermal modelling; thermal resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design (ASQED), 2013 5th Asia Symposium on
  • Conference_Location
    Penang
  • Print_ISBN
    978-1-4799-1312-1
  • Type

    conf

  • DOI
    10.1109/ASQED.2013.6643611
  • Filename
    6643611