DocumentCode
1856928
Title
Afterlife for silicon: CMOL circuit architectures
Author
Ma, Xialong ; Strukov, Dmitri B. ; Lee, Jung Hoon ; Likharev, Konstantin K.
Author_Institution
Stony Brook Univ., New york, NY, USA
fYear
2005
fDate
11-15 July 2005
Firstpage
175
Abstract
This is a brief review of our recent work on architectures for the prospective hybrid CMOS/nanowire/ nanodevice ("CMOL") circuits including digital memories, reconfigurable Boolean-logic circuits, and mixed-signal neuromorphic networks. The basic idea of CMOL circuits is to combine the advantages of CMOS technology (including its flexibility and high fabrication yield) with the extremely high potential density of molecular-scale two-terminal nanodevices. Relatively large critical dimensions of CMOS components and the "bottom-up" approach to nanodevice fabrication may keep CMOL fabrication costs at affordable level. At the same time, the density of active devices in CMOL circuits may be as high as 1012 cm2 and that they may provide an unparalleled information processing performance, up to 1020 operations per cm2 per second, at manageable power consumption.
Keywords
CMOS logic circuits; elemental semiconductors; hybrid integrated circuits; nanolithography; nanowires; semiconductor device models; silicon; Boolean-logic circuits; Si; digital memories; hybrid CMOS-nanowire-nanodevice circuit architectures; mixed-signal neuromorphic networks; nanodevice fabrication; nanolithography; potential density; power consumption; silicon; CMOS digital integrated circuits; CMOS memory circuits; CMOS technology; Costs; Energy management; Fabrication; Flexible printed circuits; Information processing; Neuromorphics; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology, 2005. 5th IEEE Conference on
Print_ISBN
0-7803-9199-3
Type
conf
DOI
10.1109/NANO.2005.1500722
Filename
1500722
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