DocumentCode :
1856969
Title :
FPGA platform for CPU design and applications
Author :
Chang, Chi-Jeng ; Huang, Chi-Wu ; Lin, Ying-Ping ; Huang, Zen-Yi ; Hu, Teng-Kuei
Author_Institution :
Dept. of Ind. Educ., Nat. Taiwan Normal Univ., Taipei, Taiwan
fYear :
2005
fDate :
11-15 July 2005
Firstpage :
187
Abstract :
This paper presents a CPU design of 25 MIPS instructions in addition to the interface controller circuitries of LCD, 7-seg and key pad and all are downloaded on a 200k gate-count FPGA board for system verification. Then an image process device developed in another FPGA board was connected to the CPU as an image accelerator. By using the same way, other mechatronic or nano devices could also be connected to the CPU with proper designed controllers. The FPGA board could be used for teaching CPU design, controlling applications and also for system-on-chip (SoC) designing since all circuitries might be incorporated in a signal FPGA chip. A multifunctional platform is gradually evolving for teaching and applications.
Keywords :
computer architecture; field programmable gate arrays; image processing equipment; liquid crystal displays; logic design; microprocessor chips; system-on-chip; 25 MIPS; CMOS; CPU design; FPGA platform; LCD; MIPS instructions; controlling applications; gate-count FPGA board; image accelerator; image process device; image sensor; interface controller circuitries; key pad; mechatronic devices; multifunctional platform; nanodevices; signal FPGA chip; system-on-chip design; CMOS image sensors; Circuits; Control systems; Education; Electrical equipment industry; Field programmable gate arrays; Hardware; Industrial control; Signal design; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology, 2005. 5th IEEE Conference on
Print_ISBN :
0-7803-9199-3
Type :
conf
DOI :
10.1109/NANO.2005.1500725
Filename :
1500725
Link To Document :
بازگشت