DocumentCode
1857172
Title
Si nanowire CMOS fabricated with minimal deviation from RMG FinFET technology showing record performance
Author
Lauer, Isaac ; Loubet, N. ; Kim, S.D. ; Ott, J.A. ; Mignot, S. ; Venigalla, R. ; Yamashita, T. ; Standaert, T. ; Faltermeier, J. ; Basker, V. ; Doris, B. ; Guillorn, M.A.
Author_Institution
Thomas J Watson Res. Center, IBM Res., Yorktown Heights, NY, USA
fYear
2015
fDate
16-18 June 2015
Abstract
We demonstrate a process flow for creating gate-all-around (GAA) Si nanowire (SiNW) MOSFETs with minimal deviation from conventional replacement metal gate (RMG) finFET technology as used in high-volume manufacturing. Using this technique, we demonstrate the highest DC performance shown for GAA SiNW MOSFETs at sub-100 nm gate pitch, and functional high-speed ring oscillators.
Keywords
CMOS integrated circuits; MOSFET; elemental semiconductors; nanowires; silicon; CMOS fabrication; RMG FinFET technology; gate-all-around MOSFET; process flow; replacement metal gate finFET technology; silicon nanowire; CMOS integrated circuits; CMOS technology; Electrostatics; FinFETs; Logic gates; Silicon; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology (VLSI Technology), 2015 Symposium on
Conference_Location
Kyoto
ISSN
0743-1562
Type
conf
DOI
10.1109/VLSIT.2015.7223653
Filename
7223653
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