• DocumentCode
    1857236
  • Title

    MoS2 FET fabrication and modeling for large-scale flexible electronics

  • Author

    Lili Yu ; El-Damak, Dina ; Sungjae Ha ; Rakheja, Shaloo ; Xi Ling ; Jing Kong ; Antoniadis, Dimitri ; Chandrakasan, Anantha ; Palacios, Tomas

  • Author_Institution
    Massachusetts Inst. of Technol., Cambridge, MA, USA
  • fYear
    2015
  • fDate
    16-18 June 2015
  • Abstract
    We present a state-of-the-art fabrication technology and physics-based model for molybdenum disulfide (MoS2) field effect transistors (FETs) to realize large-scale circuits. Uniform and large area chemical vapor deposition (CVD) growth of monolayer MoS2 was achieved by using perylene-3,4,9, 10-tetracarboxylic acid tetrapotassium salt (PTAS) seeding. Then, a gate first process results in enhancement mode FETs and also reduces performance variation and enables better process control. In addition, a Verilog-A compact model precisely predicts the performance of the fabricated MoS2 FETs and eases the large-scale integrated design. By using this technology, a switched capacitor DC-DC converter is implemented, and the measurement of the converter shows good agreement with the simulations.
  • Keywords
    DC-DC power convertors; chemical vapour deposition; field effect transistors; integrated circuit design; integrated circuit modelling; large scale integration; molybdenum compounds; switched capacitor networks; CVD growth; MoS2 FET; MoS2; PTAS seeding; Verilog-A compact model; chemical vapor deposition growth; enhancement mode FET; gate first process; large-scale circuits; large-scale integrated design; molybdenum disulfide field effect transistors; perylene-3,4,9, 10-tetracarboxylic acid tetrapotassium salt seeding; physics-based model; switched capacitor DC-DC converter; Capacitors; DC-DC power converters; Fabrication; Field effect transistors; Integrated circuit modeling; Logic gates; Solid modeling; 2D materials; MoS2; flexible IC; large scale;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology (VLSI Technology), 2015 Symposium on
  • Conference_Location
    Kyoto
  • ISSN
    0743-1562
  • Type

    conf

  • DOI
    10.1109/VLSIT.2015.7223655
  • Filename
    7223655