Title :
Low power 1T DRAM/NVM versatile memory featuring steep sub-60-mV/decade operation, fast 20-ns speed, and robust 85°C-extrapolated 1016 endurance
Author :
Yu-Chien Chiu ; Chun-Hu Cheng ; Chun-Yen Chang ; Min-Hung Lee ; Hsiao-Hsuan Hsu ; Shiang-Shiou Yen
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
Abstract :
In this work, we report a one-transistor (1T) versatile memory; the memory transistor characteristics achieve sub-60-mV/dec operation and considerably low off-state leakage of 10-15 A/μm at a supply voltage below 0.5V. The versatile memory features DRAM/NVM functions of large ΔVT window of 2.8V, fast 20-ns speed, 103s retention at 85°C, and long extrapolated 1016 endurance at 85°C, which show the potential for 3D memory application with severe requirement on both high density and low power consumption.
Keywords :
DRAM chips; low-power electronics; three-dimensional integrated circuits; 3D memory; low power 1T DRAM/NVM versatile memory; low power consumption; one-transistor versatile memory; temperature 85 C; time 103 s; time 20 ns; voltage 2.8 V; voltage 60 mV; Degradation; Logic gates; MOSFET; Nonvolatile memory; Random access memory; Silicon; Switches;
Conference_Titel :
VLSI Technology (VLSI Technology), 2015 Symposium on
Conference_Location :
Kyoto
DOI :
10.1109/VLSIT.2015.7223671
