A multiplier-free digital RMS calculation unit for integrated microsystems

Author

Daglio, Alberto ; Malcovati, Piero ; Maleberti, F.

Author_Institution

Integrated Microsyst. Lab., Pavia Univ., Italy

fYear

1999

fDate

1999

Firstpage

183

Lastpage

186

Abstract

This paper presents a novel 13-bit digital RMS calculation unit, specifically designed to be integrated together with sensor and interface circuits in complete microsystems. The circuit exploits oversampling techniques (bitstream processing) to eliminate the area inefficient multipliers required in traditional RMS calculation units. The proposed approach leads to a significant reduction (almost 30%) in the silicon area required to implement the RMS calculation algorithm for a 13 bit word

Keywords

CMOS integrated circuits; biomedical electronics; digital arithmetic; mixed analogue-digital integrated circuits; sigma-delta modulation; signal sampling; 13 bit; RMS calculation algorithm; bitstream processing; digital RMS calculation unit; integrated microsystems; interface circuits; multiplier-free RMS calculation unit; oversampling techniques; sensor; silicon area reduction; Biomedical measurements; Chemicals; Circuits; Costs; Energy consumption; Laboratories; Modems; Root mean square; Silicon; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design of Mixed-Mode Integrated Circuits and Applications, 1999. Third International Workshop on

Conference_Location

Puerto Vallarta

Print_ISBN

0-7803-5588-1

Type

conf

DOI

10.1109/MMICA.1999.833630

Filename

833630