DocumentCode :
1857804
Title :
Algorithm for phase accumulator synthesis for applications in DDS
Author :
Romero-Troncoso, R.de.J. ; Verdad, Guillermo Espinosa Flores
Author_Institution :
FIMEE, Guanajuato Univ., Salamanca, Mexico
fYear :
1999
fDate :
1999
Firstpage :
210
Lastpage :
213
Abstract :
An algorithm for area-speed optimization in phase accumulator synthesis is presented here. Digital Direct Synthesis (DDS) requires an efficient phase accumulator as its main functional block. However, fast phase accumulators are very area demanding and the trade-off between area and speed is very critical. Implementation of phase accumulators with FPGA´s and/or ASIC´s should consider the approach presented here for optimization and synthesis
Keywords :
application specific integrated circuits; circuit CAD; circuit optimisation; direct digital synthesis; field programmable gate arrays; high level synthesis; integrated circuit design; ASIC; DDS applications; FPGA; area-speed optimization; digital direct synthesis; phase accumulator synthesis; Application specific integrated circuits; Astrophysics; Clocks; Computer architecture; Field programmable gate arrays; Frequency; Logic; Pipelines; Production; Propagation delay;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design of Mixed-Mode Integrated Circuits and Applications, 1999. Third International Workshop on
Conference_Location :
Puerto Vallarta
Print_ISBN :
0-7803-5588-1
Type :
conf
DOI :
10.1109/MMICA.1999.833637
Filename :
833637
Link To Document :
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