Title :
Clock synchronization for WSI systems
Author :
Embabi, S.H.K. ; Brueske, D.E.
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Abstract :
This paper presents a clock synchronisation method which can be used to reduce the clock skew time in WSI systems. A feedback technique is used to offset the clock skewing due to process mismatches and environmental variations. Experiments and simulations indicate that the skew time can be reduced to within a few tens of picoseconds. The stability analysis shows that the system is stable under certain conditions which can be easily satisfied
Keywords :
VLSI; clocks; frequency stability; microprocessor chips; parallel architectures; synchronisation; WSI systems; clock skew time; clock synchronisation method; environmental variations; feedback technique; process mismatches; stability analysis; Charge pumps; Circuits; Clocks; Delay; Detectors; Neural networks; Phase detection; Signal processing; Stability analysis; Synchronization;
Conference_Titel :
Wafer Scale Integration, 1994. Proceedings., Sixth Annual IEEE International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-1850-1
DOI :
10.1109/ICWSI.1994.291249
