DocumentCode :
1858284
Title :
Time-Multiplexed Online Checking: A Feasibility Study
Author :
Ming Gao ; Chang Hsiu-Ming, S. ; Lisherness, P. ; Kwang-Ting Cheng, T.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA
fYear :
2008
fDate :
24-27 Nov. 2008
Firstpage :
371
Lastpage :
376
Abstract :
There is growing demand for online hardware checking capability to cope with increasing in-field failures resulting from variability and reliability problems. While many online checking schemes have been proposed, their area overhead remains too high for cost-sensitive applications. We introduce a time-multiplexed online checking scheme using embedded field-programmable blocks for checker implementation, which enables various system parts to be checked dynamically in-field in a time-multiplexed fashion. This incurs less area overhead, and could maintain fault coverage similar to traditional checkers. The test quality is studied using a probabilistic model. The implementation feasibility using a field-programmable gate array (FPGA) is demonstrated.
Keywords :
field programmable gate arrays; program verification; FPGA; embedded field-programmable blocks; field-programmable gate array; probabilistic model; reliability problems; time-multiplexed online checking; Circuit faults; Combinational circuits; Delay; Electrical fault detection; Electronic equipment testing; Fault detection; Field programmable gate arrays; Hardware; Logic testing; Space technology; Availability; Dynamic Checker; Fault Detection; Low-cost Checker; Online Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asian Test Symposium, 2008. ATS '08. 17th
Conference_Location :
Sapporo
ISSN :
1081-7735
Print_ISBN :
978-0-7695-3396-4
Type :
conf
DOI :
10.1109/ATS.2008.23
Filename :
4711619
Link To Document :
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