Numerically stable compact strong avalanche model for four-layer device simulation

Since strong avalanche is a central phenomenon in four-layer (PNPN) devices such as thyristors and TOVP´s, the usual compact model consisting of two transistors (PNP)- (NPN) must include a numerically stable strong avalanche model. To this end, Miller´s empirical expression for avalanche multiplication M(Vcb) in bipolar transistors was modified to eliminate its singularity at the collector-base breakdown voltage (V_CBO); by substituting a hyperbolic function for Miller´s equation when the collector-base voltage (V_CBO) is higher than 0.99999 V_CBO- The combined function is such that it converges asymptotically to a large but finite value for Vcb>Vcbo Furthermore, the function and its first derivative were made continuous at 0.99999 V_CBO; thus ensuring stability under very strong avalanche. The model, as tested with four layer PSpice (PNP)-(NPN) simulations, did not show any instability or nonphysical results. The resulting limited multiplication factors introduced only a 0.2% voltage overshoot error at breakdown. It was also tested satisfactorily within a circuit based quasi-3D device simulator consisting of several thousand (PNP)-(NPN) transistor pairs.