Jitter effect on digital downconversion receiver with undersampling scheme

Undersampling phase modulated signals directly at high frequency band, the effect by ADC´s aperture jitter characteristics and sampling clock instability of the system can not be ignored. The sampling jitter brings additional phase noise to the constellation pattern, thus the BER (bit error rate) performance will be degraded. This paper presents the relationship between the input frequency to ADC (analog-to-digital converter) and the sampling jitter in the digital IF (intermediate frequency) downconversion receiver with undersampling scheme. The computer simulation results with theoretical IF sampling receiver model and the measurement result with a real hardware will be presented. According to the results, for wireless LAN standard the effective IF QPSK signal input frequency of ADC was limited below around 300 MHz with RMS (root mean square) jitter of 25 ps for 40 MHz sampling rate.