DocumentCode
1858799
Title
Implications of Merging Phases on Scalability of Multi-core Architectures
Author
Manivannan, Madhavan ; Juurlink, Ben ; Stenstrom, Per
Author_Institution
Chalmers Univ. of Technol., Gothenburg, Sweden
fYear
2011
fDate
13-16 Sept. 2011
Firstpage
622
Lastpage
631
Abstract
Amdahl´s Law dictates that in parallel applications serial sections establish an upper limit on the scalability. Asymmetric chip multiprocessors with a large core in addition to several small cores have been advocated for recently as a promising design paradigm because the large core can accelerate the execution of serial sections and hence mitigate the scalability bottlenecks due to large serial sections. This paper studies the scalability of a set of data mining workloads that have negligible serial sections. The formulation of Amdahl´s Law, that optimistically assumes constant serial sections, estimates these workloads to scale to hundreds of cores in a chip multiprocessor (CMP). However the overhead in carrying out merging (or reduction) operations makes scalability to peak at lesser number. We establish this by extending theAmdahl´s speedup model to factor in the impact of reduction operations on the speedup of applications on symmetric as well as asymmetric CMP designs. Our analytical model estimates that asymmetric CMPs with one large and many tiny cores are only optimal for applications with a low reduction overhead. However, as the overhead starts to increase, the balance is shifted towards using fewer but more capable cores. This eventually limits the performance advantage of asymmetric over symmetric CMPs.
Keywords
data mining; multiprocessing systems; parallel architectures; Amdahl´s law; asymmetric chip multiprocessors; data mining workloads; design paradigm; merging phases; multicore architectures; parallel applications; scalability bottlenecks; Analytical models; Equations; Mathematical model; Merging; Multicore processing; Predictive models; Scalability; Amdahl´s Law; Chip Multiprocessor; Redcution operations;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing (ICPP), 2011 International Conference on
Conference_Location
Taipei City
ISSN
0190-3918
Print_ISBN
978-1-4577-1336-1
Electronic_ISBN
0190-3918
Type
conf
DOI
10.1109/ICPP.2011.74
Filename
6047230
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