DocumentCode :
1859656
Title :
Stability investigation for 1R-2W and 2R-2W Register File SRAM bit cell using FinFET in subthreshold region
Author :
Mohan, Sreyas ; Pande, Kirti S. ; Murty, N.S.
Author_Institution :
Dept. of Electron. & Commun. Eng., Amrita Vishwa Vidyapeetham (Univ.), Bangalore, India
fYear :
2015
fDate :
8-10 Jan. 2015
Firstpage :
1
Lastpage :
6
Abstract :
Register Files (RF) are multi-port static memories with dedicated READ and WRITE ports for high bandwidth memory operations. The Register Files are important components in today´s devices like Central Processing Unit (CPU) and Network Routers. Low power and area critical RF memories use SRAMs rather than the latches/flip-flops as the building block. Due to lack of performance and short channel effects, scaling of conventional MOSFETs towards Deep Submicron (DSM) dimensions in memories as well as in other System-on-Chip (SoC) designs became tedious. Recently in DSM designs, the conventional planar MOSFETs are being replaced by thin body FinFETs because of their better subthreshold swing, reduced short channel effects and better scalability. This paper proposes a 6T subthreshold 1R-2W SRAM and 8T 2R-2W SRAM bit cell designs using 25nm FinFET transistors having independent READ and WRITE ports. The proposed structures are with reduced leakage power and also show improved read stability and write stability as compared to the conventional single port SRAM structure.
Keywords :
MOS memory circuits; SRAM chips; flip-flops; system-on-chip; 1R-2W register file; 2R-2W register file; FinFET transistors; MOSFET; SRAM bit cell; SoC design; deep submicron dimensions; high bandwidth memory operations; multiport static memories; read ports; read stability; reduced leakage power; short channel effects; single port SRAM structure; size 25 nm; subthreshold region; system-on-chip; write ports; write stability; Flip-flops; Periodic structures; Radio frequency; Random access memory; Transistors; BSIM CMG; BSIM IMG; FinFET; SPICE; custom design; multiport SRAM; static noise margin (SNM);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), 2015 International Conference on
Conference_Location :
Bangalore
Print_ISBN :
978-1-4799-7925-7
Type :
conf
DOI :
10.1109/VLSI-SATA.2015.7050495
Filename :
7050495
Link To Document :
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