• DocumentCode
    1859723
  • Title

    Interconnect Built-In Self-Repair and Adaptive-Serialization (I-BIRAS) for 3D integrated systems

  • Author

    Nicolaidis, M. ; Pasca, Vladimir ; Anghel, Lorena

  • Author_Institution
    TIMA Lab., UJF, Grenoble, France
  • fYear
    2010
  • fDate
    5-7 July 2010
  • Firstpage
    218
  • Lastpage
    218
  • Abstract
    The high defect rates of the TSV manufacturing processes lead to poor yield. Interconnect repair and serialization techniques were proposed to improve yield. In these papers the control of the repair and serialization circuitry are determined off-chip and are stored in one-time-programmable memories. In this work we present an Interconnect Built-in Self-Repair and Adaptive-Serialization approach (I-BIRAS), where interconnect repair and data serialization/deserialization is performed without external intervention (reducing cost of external equipment) and can be executed at any time (after fabrication and all along system life), thus coping with both fabrication and system-life defects.
  • Keywords
    integrated circuit interconnections; integrated circuit testing; three-dimensional integrated circuits; 3D integrated system; I-BIRAS; TSV manufacturing process; data deserialization; data serialization; defect rate; fabrication defect; interconnect built-in self-repair and adaptive-serialization; off-chip; one-time-programmable memory; serialization circuitry; system-life defect; Circuit faults; Computer architecture; Fault tolerance; Integrated circuit interconnections; Maintenance engineering; Registers; Three dimensional displays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    On-Line Testing Symposium (IOLTS), 2010 IEEE 16th International
  • Conference_Location
    Corfu
  • Print_ISBN
    978-1-4244-7724-1
  • Type

    conf

  • DOI
    10.1109/IOLTS.2010.5560198
  • Filename
    5560198