DocumentCode :
1860552
Title :
SBST for on-line detection of hard faults in multiprocessor applications under energy constraints
Author :
Merentitis, A. ; Margaris, D. ; Kranitis, N. ; Paschalis, A. ; Gizopoulos, D.
Author_Institution :
Dept. of Inf. & Telecommun., Univ. of Athens, Athens, Greece
fYear :
2010
fDate :
5-7 July 2010
Firstpage :
62
Lastpage :
67
Abstract :
Software-Based Self-Test (SBST) has emerged as an effective method for on-line testing of processors integrated in non safety-critical systems. However, especially for multi-core processors, the notion of dependability encompasses not only high quality on-line tests with minimum performance overhead but also methods for preventing the generation of excessive power and heat that exacerbate silicon aging mechanisms and can cause long term reliability problems. In this paper, we initially extend the capabilities of a multiprocessor simulator in order to evaluate the overhead in the execution of the useful application load in terms of both performance and energy consumption. We utilize the derived power evaluation framework to assess the overhead of SBST implemented as a test thread in a multiprocessor environment. A range of typical processor configurations is considered. The application load consists of some representative SPEC benchmarks, and various scenarios for the execution of the test thread are studied (sporadic or continuous execution). Finally, we apply in a multiprocessor context an energy optimization methodology that was originally proposed to increase battery life for battery-powered devices. The methodology reduces significantly the energy and performance overhead without affecting the test coverage of the SBST routines.
Keywords :
automatic test pattern generation; automatic test software; fault diagnosis; microprocessor chips; multi-threading; continuous execution; energy constraint; energy consumption; energy optimization; multicore processors; multiprocessor application; multiprocessor environment; non safety-critical system; online hard fault detection; performance overhead; power evaluation framework; processor configuration; processor dependability; processor testing; reliability problem; silicon aging; software-based self-test; sporadic execution; Benchmark testing; Circuit faults; Delay; Energy consumption; Hardware; Program processors; hard faults; low energy optimization; multiprocessors; on-line test; software-based self-testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
On-Line Testing Symposium (IOLTS), 2010 IEEE 16th International
Conference_Location :
Corfu
Print_ISBN :
978-1-4244-7724-1
Type :
conf
DOI :
10.1109/IOLTS.2010.5560233
Filename :
5560233
Link To Document :
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