DocumentCode :
1861223
Title :
A 3D miniaturization method for low impedance designs
Author :
Banerjee, S. Riki ; Drayton, Rhonda Franklin
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
fYear :
2005
fDate :
10-13 May 2005
Firstpage :
71
Lastpage :
74
Abstract :
Microstrip interconnects with a V conductor are designed, fabricated, and measured to provide a compact solution for designs requiring low characteristic impedance lines. S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 μm deep V structure produces a 33.8 Ω line with strong standing waves and reflections under 5 dB. To further reduce the impedance, a partial shield is added that results in 6.7 times reduction of signal line width, near elimination of open end effect, and excellent correlation with a standard 15 Ω microstrip up to 25 GHz. A filter demonstration shows near ideal behavior in 3 dB response and low return loss when compared to a similar design.
Keywords :
S-parameters; electric impedance; integrated circuit interconnections; microstrip lines; 0.5 cm; 15 ohm; 25 GHz; 33.8 ohm; 35 GHz; 3D miniaturization; S-parameter curves; V conductor; impedance lines; low impedance design; microstrip interconnects; signal line width reduction; Capacitors; Conductors; Dielectric constant; Filters; Impedance; Inductors; Integrated circuit interconnections; Microstrip components; Packaging; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Propagation on Interconnects, 2005. Proceedings. 9th IEEE Workshop on
Print_ISBN :
0-7803-9054-7
Type :
conf
DOI :
10.1109/SPI.2005.1500902
Filename :
1500902
Link To Document :
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