• DocumentCode
    1861249
  • Title

    Tunable replica bits for dynamic variation tolerance in 8T SRAM

  • Author

    Raychowdhury, Arijit ; Geuskens, Bibiche ; Bowman, Keith ; Tschanz, James ; Lu, Shih-Lien ; Karnik, Tanay ; Khellah, Muhammad ; De, Vivek

  • Author_Institution
    Circuits Res. Lab., Intel, Hillsboro, OR, USA
  • fYear
    2010
  • fDate
    16-18 June 2010
  • Firstpage
    39
  • Lastpage
    40
  • Abstract
    Infrequent dynamic events like VCC droops and temperature changes result in the use of a static VCC guard-band. Measured data on a 16KB 8T array featuring tunable replica bits illustrate the opportunity of eliminating a majority of the static guard-band in memory arrays, resulting in lower operating VCC/power.
  • Keywords
    SRAM chips; 8T SRAM; V<;sub>CC<;/sub> droops; dynamic variation tolerance; memory arrays; operating VCC/power; static V<;sub>CC<;/sub> guard-band; tunable replica bits; Arrays; Detectors; Measurement uncertainty; Noise; Random access memory; Timing; Tuning;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits (VLSIC), 2010 IEEE Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4244-5454-9
  • Type

    conf

  • DOI
    10.1109/VLSIC.2010.5560261
  • Filename
    5560261
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1861249