A fully integrated, 300pJ/bit, dual mode wireless transceiver for cm-range interconnects

Author

Gambini, S. ; Crossley, J. ; Alon, E. ; Rabaey, J.

fYear

2010

fDate

16-18 June 2010

Firstpage

31

Lastpage

32

Abstract

A transceiver aimed at ultra-short range wireless links uses a dual-mode architecture to achieve interference robustness at ultra-low power. The receiver uses a direct-AM detection architecture combined with a high-pass baseband filter to suppress out-of-band interferers, but is reconfigured to use a mixer-high-pass filter cascade designed to suppress in-band blockers based on a real-time BER estimate. The system consumes 300uW at 1MBps (1.75mW at 16 Mbps) and can operate with a worst-case SIR of 13dB (referred to peak power).

Keywords

band-pass filters; error statistics; estimation theory; high-pass filters; interference suppression; radio links; radiofrequency interference; transceivers; SIR; cm-range interconnects; direct-AM detection architecture; dual mode wireless transceiver; dual-mode architecture; high-pass baseband filter; in-band blockers; interference robustness; mixer-high-pass filter cascade; out-of-band interferers; real-time BER estimate; ultra-low power; ultra-short range wireless links; Ad hoc networks; Interference; Mixers; Radio frequency; Receivers; Sensitivity; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits (VLSIC), 2010 IEEE Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

978-1-4244-5454-9

Type

conf

DOI

10.1109/VLSIC.2010.5560262

Filename

5560262