DocumentCode :
1861636
Title :
Video decimator design using a systolic array
Author :
Campbell, Stuart ; Chung, S.M.
Author_Institution :
Wright State University
fYear :
1993
fDate :
3-6 May 1993
Firstpage :
1726
Lastpage :
1729
Keywords :
Bandwidth; Cameras; Field programmable gate arrays; Filtering; Signal design; Streaming media; Systolic arrays; Video compression; Video sharing; Videoconference;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
IEEE
Print_ISBN :
0-7803-1281-3
Type :
conf
Filename :
693001
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1861636
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