DocumentCode
1861963
Title
Automatic generation of model checking properties and constraints from production based specification
Author
Jahanpour, M.S. ; Mohamed, O. Ait
Author_Institution
Cortina Syst. Inc, Canada
Volume
3
fYear
2004
fDate
25-28 July 2004
Abstract
We propose a technique for automatic generation of environment constraints and component properties used in the constrained model checking (CMC). Beginning from a production based specification of the interface of two components, the tool generates a set of constraints for the interface signals. Industrial model checkers, like formal check can consequently use these constraints and properties to model check the components at each side of the interface separately. In this way, the methodology allows a compositional verification.
Keywords
circuit simulation; formal specification; formal verification; circuit simulation; constrained model checking; formal check; formal verification; industrial model checkers; model checking properties; production based specification; Boolean functions; Circuit synthesis; Data structures; Formal verification; Hardware; High level languages; Production systems; Protocols; Signal generators; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on
Print_ISBN
0-7803-8346-X
Type
conf
DOI
10.1109/MWSCAS.2004.1354388
Filename
1354388
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