Title :
A 2.5kV isolation 35kV/us CMR 250Mbps 0.13mA/Mbps digital isolator in standard CMOS with an on-chip small transformer
Author :
Kaeriyama, Shunichi ; Uchida, Shinichi ; Furumiya, Masayuki ; Okada, Mitsuji ; Mizuno, Masayuki
Author_Institution :
NEC Corp., Sagamihara, Japan
Abstract :
An on-chip transformer-based digital isolator for intelligent power management (IPM) systems is proposed. It greatly reduces the number of chips in IPM systems by allowing integration of isolators in a CMOS chip together with MPUs or gate drivers. With a proposed pulse generation / detection scheme that enables a 5V standard CMOS transistor to utilize GHz-band signals, transformer area is reduced to 1/4~1/8 that of conventional transformers. A test chip achieves a 2.5kV isolation voltage, a 35kV/us CMR, a 1.6mA static current and a 250Mbps data rate, all which are equal to or superior to those of photo couplers or conventional digital isolators. The high-speed low-power capability expands the application potential to include isolated serial links, medical devices, displays, sensors, etc.
Keywords :
CMOS analogue integrated circuits; power transformers; CMOS; CMR; IPM system; bit rate 250 Mbit/s; current 1.6 mA; detection scheme; digital isolator; intelligent power management; on-chip small transformer; pulse generation; voltage 2.5 kV; voltage 5 V; CMOS integrated circuits; Coils; Driver circuits; Isolators; Noise; Receivers; System-on-a-chip; IPM; isolator; on-chip transformer;
Conference_Titel :
VLSI Circuits (VLSIC), 2010 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-5454-9
DOI :
10.1109/VLSIC.2010.5560301