Title :
Techniques to reduce mode conversion phenomena in high-speed on chip interconnects
Author :
Query, Y. ; Gouguec, T. Le ; Martin, P.M. ; Berre, D. Le ; Huret, F.
Author_Institution :
Lab. d´´Electronique et Systemes de Telecommun., CNRS, Brest, France
Abstract :
This paper describes frequency effects of mode conversion in very high-speed VLSI circuits through a set of full-wave simulations. Long on-chip interconnects such as clock nets are concerned by this phenomenon despite conventional shielding techniques. The solutions proposed for mode conversion reduction rely on transposition of design rules used in microwave circuits.
Keywords :
VLSI; circuit optimisation; integrated circuit design; integrated circuit interconnections; very high speed integrated circuits; clock nets; full-wave simulations; high-speed VLSI circuits; high-speed on chip interconnects; long on-chip interconnects; microwave circuits; mode conversion; CMOS technology; Coupling circuits; Electromagnetic analysis; Inductance; Integrated circuit interconnections; Microwave circuits; RLC circuits; Transmission line discontinuities; Ultra large scale integration; Very large scale integration;
Conference_Titel :
Signal Propagation on Interconnects, 2005. Proceedings. 9th IEEE Workshop on
Print_ISBN :
0-7803-9054-7
DOI :
10.1109/SPI.2005.1500941
