• DocumentCode
    1862366
  • Title

    Fine grained power analysis and low-power techniques of a 128GFLOPS/58W SPARC64™ VIIIfx processor for peta-scale computing

  • Author

    Okano, Hiroshi ; Kawabe, Yukihito ; Kan, Ryuji ; Yoshida, Toshio ; Yamazaki, Iwao ; Sakurai, Hitoshi ; Hondou, Mikio ; Matsui, Nobuyuki ; Yamashita, Hideo ; Nakada, Tatsumi ; Maruyama, Takumi ; Asakawa, Takeo

  • Author_Institution
    Fujitsu Ltd., Kawasaki, Japan
  • fYear
    2010
  • fDate
    16-18 June 2010
  • Firstpage
    167
  • Lastpage
    168
  • Abstract
    An 8-core SPARC64™ VIIIfx processor is fabricated in a 45nm CMOS process and achieves a peak performance of 128GFLOPS. Measured results show that the processor consumes only 58W of power when executing a maximum power program. Fine-grained power analysis was used to tune the micro-architecture for low power consumption, and circuit-level low-power techniques were developed. Water cooling and supply voltage adjustment contribute to power reduction at the system level.
  • Keywords
    CMOS integrated circuits; computer architecture; microprocessor chips; multiprocessing systems; power aware computing; 128GFLOPS; CMOS process; SPARC64™ VIIIfx processor; circuit-level low-power techniques; micro-architecture; peta-scale computing; power analysis; Choppers; Clocks; Latches; Microprocessors; Power demand; Power measurement; Random access memory; HPC; power analysis and low power; processor;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits (VLSIC), 2010 IEEE Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4244-5454-9
  • Type

    conf

  • DOI
    10.1109/VLSIC.2010.5560313
  • Filename
    5560313
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1862366