DocumentCode
1862582
Title
A compact 6 GHz to 12 GHz digital PLL with coupled dual-LC tank DCO
Author
Goel, A. ; Rylyakov, A. ; Ainspan, H. ; Friedman, D.
Author_Institution
Univ. of Southern California, Los Angeles, CA, USA
fYear
2010
fDate
16-18 June 2010
Firstpage
141
Lastpage
142
Abstract
A digital PLL, realized in 45nm SOI CMOS, features a dual LC-tank DCO with nested inductors, achieving an octave of tuning range and area of 0.111 mm2. Digital control of coupled LC-tanks creates new capabilities, enabling a 10% increase in tuning range and a 28 times reduction of DCO gain. The rms jitter, integrated from fc/1667 to fc/2, is 362 fs at 12 GHz and 274 fs at 6 GHz.
Keywords
CMOS integrated circuits; MMIC oscillators; capacitors; digital phase locked loops; field effect MMIC; inductors; silicon-on-insulator; SOI CMOS; coupled dual LC tank DCO; digital PLL; digitally controlled oscillator; frequency 6 GHz to 12 GHz; nested inductor; size 45 nm; Couplings; Frequency measurement; Inductors; Phase locked loops; Phase noise; Tuning; Digital PLL; SOI; bang-bang PFD; coupled inductors; oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits (VLSIC), 2010 IEEE Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-5454-9
Type
conf
DOI
10.1109/VLSIC.2010.5560320
Filename
5560320
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