An Optimized Checkpointing Based Learning Algorithm for Single Event Upsets

With the arrival of the CMOS technology, the sizes of the transistors are anything but increasing. Due to the current transistor sizes single event upsets, which were over looked for the previous generation are not so anymore. With memories and other peripherals well protected from single event upsets, processors are in a critical state. Hard errors too have a higher probability of occurrence. This work is aimed at detection of soft errors (SEUs) and making programs more resilient to them and to detect hard errors and eliminate them. SEUs are transient errors and hard errors are permanent in nature. The idea is to use the concept of CFGs, DFGs and data dependency graphs with Integer Linear Programming to improve the program and testing it on fault induced architectures.