DocumentCode :
186373
Title :
A comparative analysis of microarchitecture effects on CPU and GPU memory system behavior
Author :
Hestness, Joel ; Keckler, Stephen W. ; Wood, David A.
Author_Institution :
Dept. of Comput. Sci., Univ. of Wisconsin at Madison, Madison, WI, USA
fYear :
2014
fDate :
26-28 Oct. 2014
Firstpage :
150
Lastpage :
160
Abstract :
While heterogeneous CPU/GPU systems have been traditionally implemented on separate chips, each with their own private DRAM, heterogeneous processors are integrating these different core types on the same die with access to a common physical memory. Further, emerging heterogeneous CPU-GPU processors promise to offer tighter coupling between core types via a unified virtual address space and cache coherence. To adequately address the potential opportunities and pitfalls that may arise from this tighter coupling, it is important to have a deep understanding of application- and memory-level demands from both CPU and GPU cores. This paper presents a detailed comparison of memory access behavior for parallel applications executing on each core type in tightly-controlled heterogeneous CPU-GPU processor simulation. This characterization indicates that applications are typically designed with similar algorithmic structures for CPU and GPU cores, and each core type´s memory access path has a similar locality filtering role. However, the different core and cache microarchitectures expose substantially different memory-level parallelism (MLP), which results in different instantaneous memory access rates and sensitivity to memory hierarchy architecture.
Keywords :
DRAM chips; graphics processing units; multiprocessing systems; parallel processing; CPU core; DRAM memory system; GPU core; MLP; heterogeneous processors; memory access behavior; memory-level parallelism; microarchitecture effects; parallel applications; Bandwidth; Benchmark testing; Graphics processing units; Instruction sets; Pipelines; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Workload Characterization (IISWC), 2014 IEEE International Symposium on
Conference_Location :
Raleigh, NC
Print_ISBN :
978-1-4799-6452-9
Type :
conf
DOI :
10.1109/IISWC.2014.6983054
Filename :
6983054
Link To Document :
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