Slip defect generation on GaAs wafers during high temperature process: a thermoelastic study from a crystallographic viewpoint

Author

Sawada, S. ; Yoshida, H. ; Kiyama, M. ; Mukai, H. ; Nakai, R. ; Takebe, T. ; Tatsumi, M. ; Kaji, M. ; Fujita, K.

Author_Institution

Sumitomo Electr. Ind. Ltd., Osaka, Japan

fYear

1996

fDate

3-6 Nov. 1996

Firstpage

50

Lastpage

53

Abstract

In this work we investigate the mechanism of slip defect generation, using a simple heat flow simulation during an MBE process, a wafer heating apparatus, and a thermoelastic analysis from a crystallographic viewpoint. We find that the slip defect pattern predicted from the analysis agrees with the experiment and confirm that slip defects are prone to occur at orientation flat (OF) and notch edge.

Keywords

III-V semiconductors; gallium arsenide; internal stresses; molecular beam epitaxial growth; semiconductor epitaxial layers; semiconductor growth; slip; temperature distribution; thermal stresses; thermoelasticity; GaAs; III-V semiconductors; MBE process; crystallography; heat flow simulation; high temperature process; notch edge; orientation flat; slip defect generation; thermoelastic study; wafer heating apparatus; Crystallography; Epitaxial growth; Gallium arsenide; Infrared heating; Molecular beam epitaxial growth; Semiconductor device modeling; Temperature; Thermal force; Thermal stresses; Thermoelasticity;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1996. Technical Digest 1996., 18th Annual

Conference_Location

Orlando, FL, USA

ISSN

1064-7775

Print_ISBN

0-7803-3504-X

Type

conf

DOI

10.1109/GAAS.1996.567635

Filename

567635