An Approach for Specifying the ADC and AGC Requirements for UWB Digital Receivers

Digital pulsed ultra wideband (UWB) receivers offer numerous advantages compared to architectures based on analogue correlation, but present unique implementation challenges. The specification of the Analogue-to-Digital Converter (ADC) resolution constitutes one of the most critical activities in the design of digital UWB receivers. Moreover, multi-bit ADCs must be associated with an Automatic Gain Control block which avoids the sub-optimal regimes of the ADC dominated by quantisation or saturation noise. This paper shows how to determine the ADC resolution requirements and the optimal Automatic Gain Control (AGC) settings for the general class of digital receivers. We conclude that 3 bits provide sufficient resolution on condition that the AGC scales the input signal at a reference root mean squared (RMS) level of half the ADC saturation voltage.