Title :
Large area 19.4% efficient rear passivated silicon solar cells with local Al BSF and screen-printed contacts
Author :
Lai, Jiun-Hong ; Upadhyaya, Ajay ; Ramanathan, Rishi ; Das, Arnab ; Tate, Keith ; Upadhyaya, Vijaykumar ; Kapoor, Aditya ; Chen, Chai-Wei ; Rohatgi, Ajeet
Author_Institution :
Univ. Center of Excellence for Photovoltaics, Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
Summary form only given. This paper describes the cell design and technology for achieving 19.4% efficient cells on large-area (239 cm2) commercial grade Cz Si wafers using industrially feasible oxide/SiNx rear passivation and screen-printed local back contacts. A combination of optimized front and back dielectrics, rear surface finish, oxide thickness and fixed oxide charge and interface quality provided effective surface passivation without parasitic shunting. Increasing the rear oxide thickness from 40 Å to 90 Å in conjunction with reducing the surface roughness from 5 mm to 0.2 mm increased the Voc by 16 mV to 656 mV, Jsc was 38.1 mA/cm2 and FF was 0.778 for the 19.4% cell, which is the highest efficiency 239 cm2 fully screen-printed Cz cell. Compared to 18.6% full Al-BSF reference cell, LBSF improved the BSR from 71% to 95% and lowered the BSRV from 310 to 130 cm/s. 2D computer simulations were performed to optimize the size, shape and spacing of local BSF regions to obtain good FF. Model calculations show that 20% efficiency cells can be achieved with further optimization of local Al-BSF cell structure and improved screen-printed contacts.
Keywords :
electrical contacts; elemental semiconductors; passivation; silicon; solar cells; surface roughness; 2D computer simulation; Si; back dielectric optimization; commercial grade wafer; efficiency 19.4 percent; efficiency 20 percent; fixed oxide charge; front dielectric optimization; industrially feasible rear passivation; interface quality; local Al BSF; parasitic shunting; rear oxide thickness; rear passivated solar cell; rear surface finish; screen-printed local back contact; shape optimization; size optimization; spacing optimization; surface passivation; surface roughness; voltage 16 mV to 656 mV; Passivation; Photovoltaic systems; Rough surfaces; Silicon; Surface finishing; Surface roughness;
Conference_Titel :
Photovoltaic Specialists Conference (PVSC), 2011 37th IEEE
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-9966-3
DOI :
10.1109/PVSC.2011.6186329