Design and implementation of 3-D imaging sonar signal processing on FPGAs

This paper proposes the implementation of 3-D imaging sonar signal processing on FPGAs. The architecture and cut-away view of the signal processor is shown. The procedures of sonar signal processing and electronic signal processing are also illustrated. Finally, the paper gives the resources utilizations for the FPGAs. The proposed signal processor has both low communication overhead and low requirement of hardware resource.