• DocumentCode
    1865515
  • Title

    Relaxing cache coherence protocol with QOLB synchronizations

  • Author

    Lee, Jae Bum ; Jhon, Chu Shik

  • Author_Institution
    Dept. of Comput. Eng., Seoul Nat. Univ., South Korea
  • fYear
    1997
  • fDate
    28 Apr-2 May 1997
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Cache memories are widely accepted in shared-memory multiprocessor systems because they make possible the reduction of network traffic and memory latencies. However, they impose substantial overheads of cache coherency maintenance and also engender some inefficiencies of coherence misses. The paper considers that constraints of cache coherency can be relaxed in a region where exclusive accesses are guaranteed by synchronization operations, so that the execution time of parallel programs can be decreased. When an acquire operation occurs, the cache coherence protocol could not be applied to the operations following an acquire operation until a release operation is issued. The updated data in the region are transferred to other processors when a release operation is performed. The authors alleviate the overheads of release operations using QOLB synchronization primitives. Using a program-driven simulation, the new cache coherence protocol shows performance improvements in most parallel applications, and execution times can also be reduced effectively as the number of processors is increased
  • Keywords
    cache storage; coherence; memory architecture; memory protocols; parallel programming; shared memory systems; software performance evaluation; synchronisation; virtual machines; QOLB synchronization; QOLB synchronization primitives; acquire operation; cache coherence protocol relaxation; cache coherency; cache coherency maintenance overhead; cache memories; coherence misses; execution time; guaranteed exclusive access; memory latency reduction; network traffic reduction; parallel programs; program-driven simulation; release operation; shared-memory multiprocessor systems; updated data; Access protocols; Cache storage; Coherence; Computer networks; Delay; Electronic mail; Multiprocessing systems; Protection; Telecommunication traffic; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing on the Information Superhighway, 1997. HPC Asia '97
  • Conference_Location
    Seoul
  • Print_ISBN
    0-8186-7901-8
  • Type

    conf

  • DOI
    10.1109/HPC.1997.592112
  • Filename
    592112