• DocumentCode
    1866357
  • Title

    Design and proof of high quality HfAlO/sub x/ film formation for MOSCAPs and nMOSFETs through Layer-by-Layer Deposition and Annealing process

  • Author

    Nabatame, T. ; Iwamoto, K. ; Ota, H. ; Tominaga, K. ; Hisamatsu, H. ; Yasuda, T. ; Yamamoto, K. ; Mizubayashi, W. ; Morita, Y. ; Yasuda, N. ; Ohno, M. ; Horikawa, T. ; Toriumi, A.

  • Author_Institution
    MIRAI-ASET, Tsukuba, Japan
  • fYear
    2003
  • fDate
    10-12 June 2003
  • Firstpage
    25
  • Lastpage
    26
  • Abstract
    We propose a new method for high-k film growth and demonstrate its usefulness in terms of improvements of electrical characteristics of MOSCAPs and nMOSFETs. Layer-by-Layer Deposition & Annealing (LL-D&A) is a key concept to reduce impurities incorporated in the film through decomposition of precursors. For HfAlO/sub X/ (Hf:75at.%), it is shown that there are big differences in physical and electrical properties between LL-D&A and conventional ALD+PDA. The maximum film thickness for annealing to effectively remove impurities and presumably to cure imperfections should be less than 1.8 nm. The excellent properties for EOT=1.38 nm HfAlO/sub X/ grown through D&A(O/sub 2/) process, such as a very small flatband voltage shift (/spl delta/V/sub FB/) less than 0.06 V for MOSCAP, a well controlled subthreshold swing of 77 mV/dec, a peak mobility of 210 cm/sup 2//Vs and 10-year lifetime at V/sub g/=-1.9 V for poly-Si gate nMOSFET, manifest the superiority of LL-D&A to the conventional ALD+PDA.
  • Keywords
    MOS capacitors; MOSFET; annealing; atomic layer deposition; dielectric thin films; elemental semiconductors; hafnium compounds; silicon; -1.9 V; 0.06 V; 1.38 nm; 10 year; ALD; HfAlO/sub x/; HfAlO/sub x/ film; MOSCAP; MOSFET; Si; annealing; decomposition; electrical properties; flatband voltage shift; impurities; layer by layer deposition; physical properties; subthreshold swing; Annealing; Electric variables; High K dielectric materials; High-K gate dielectrics; Impurities; MOSFETs; Materials science and technology; Silicon compounds; Thermal stability; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Print_ISBN
    4-89114-033-X
  • Type

    conf

  • DOI
    10.1109/VLSIT.2003.1221068
  • Filename
    1221068