Re-evaluating impurity levels in crystal growth for C-SI: Considerations for growing ingots with reduced impurities for higher cell efficiencies

To facilitate the drive to grid parity, it is critical to optimize the starting material for improved cell performance. The target of this research is to investigate various approaches to reduce the contamination from impurities during the growing of the c-Si starting material ingots. Using different coatings on the containment vessels for silicon melting, and based on different growing conditions, it is possible to determine an improved approach for reduced impurity content. The goal is to establish a cost & technology viable mode of lowering impurity levels to provide better cell efficiency to drive to lower overall $/W. In addition, the relative impact of grain boundaries vs impurities as sources for recombination which lowers cell efficiencies is assessed. Experiments are performed on growth of c-Si ingot material using both standard modes, as well as newly developing techniques, with various crucible coatings to control the level of impurities. Different coatings for the crucibles are investigated and show the impact on impurity control. Some of the materials growth was done in conjunction with Oak Ridge National Labs. The results indicate that the level of impurities can be reduced by the proper choice of conditions and coatings, leading to improvements in the starting materials and hence for better cell efficiency. The results will be discussed in the context of directions for ingot growth at lower costs, contrasting prior alternative approaches, current best practices, as well as novel alternatives for future development.