• DocumentCode
    18669
  • Title

    Hamming SEC-DAED and Extended Hamming SEC-DED-TAED Codes Through Selective Shortening and Bit Placement

  • Author

    Sanchez-Macian, Alfonso ; Reviriego, Pedro ; Maestro, Juan Antonio

  • Author_Institution
    Univ. Antonio de Nebrija, Madrid, Spain
  • Volume
    14
  • Issue
    1
  • fYear
    2014
  • fDate
    Mar-14
  • Firstpage
    574
  • Lastpage
    576
  • Abstract
    Radiation particles can impact registers or memories creating soft errors. These errors can modify more than one bit causing a multiple cell upset (MCU) which consists of errors in registers or memory cells that are physically close. These MCUs can affect a single word, producing adjacent bit errors. Hamming codes are commonly used to protect memories or registers from soft errors. However, when multiple errors occur, a Hamming code may not detect them. In this letter, single-error-correction double adjacent error detection Hamming codes are presented for 16-, 32-, and 64-bit words. Additionally, single-error-correction double-error-detection triple adjacent error detection codes based on extended Hamming are presented as well. The enhanced detection is achieved by performing a selective shortening and reordering of the Hamming matrix so adjacent errors result in a syndrome that does not match that of any single error. These codes will help in the detection of MCUs in SRAM memory designs.
  • Keywords
    Hamming codes; SRAM chips; error correction codes; error detection codes; matrix algebra; radiation hardening (electronics); Hamming code; Hamming matrix; SRAM memory design; adjacent bit error; bit placement; double adjacent error detection code; extended Hamming SEC-DED-TAED code; memory cells; multiple cell upset; radiation particle; registers; selective shortening; single-error-correction code; soft error; storage capacity 16 bit; storage capacity 32 bit; storage capacity 64 bit; Algorithm design and analysis; Error correction; Error correction codes; Mathematical model; Parity check codes; Random access memory; Registers; Error correction codes (ECCs); Hamming codes; memory; multiple cell upsets (MCUs);
  • fLanguage
    English
  • Journal_Title
    Device and Materials Reliability, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1530-4388
  • Type

    jour

  • DOI
    10.1109/TDMR.2012.2204753
  • Filename
    6217302