DocumentCode
1867277
Title
Compact and fast multiplier using dual array tree structure
Author
Park, M.C. ; Lee, B.W. ; Kim, G.M. ; Kim, D.H.
Author_Institution
Samsung Electronic Co.
fYear
1993
fDate
3-6 May 1993
Firstpage
1817
Lastpage
1820
Keywords
CMOS process; Circuit topology; Clocks; Digital signal processing; Digital signal processors; Pipelines; Reduced instruction set computing; Tree data structures; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location
IEEE
Print_ISBN
0-7803-1281-3
Type
conf
Filename
693024
Link To Document