DocumentCode :
186773
Title :
Novel area-efficient techniques for improving ESD performance of Drain extended transistors
Author :
Appaswamy, A. ; Farbiz, Farzan ; Salman, A.
Author_Institution :
Analog ESD Lab., Texas Instrum., Dallas, TX, USA
fYear :
2014
fDate :
1-5 June 2014
Abstract :
DEMOS devices have poor ESD robustness due to kirk effect induced snapback. Isolated DEMOS devices, in addition to the kirk effect induced second snapback, are also vulnerable to failures induced by the parasitic NPN to isolation. In addition, we demonstrate here, that some DEMOS devices show intrinsically non-scalable breakdown current (IT1) behavior due to insufficient body resistance. We then demonstrate techniques to restore IT1 scalability in these devices. We finally demonstrate the effectiveness of using selectively SBLKed drain fingers to enable self protection in small DEMOS devices.
Keywords :
MIS devices; electrostatic discharge; DEMOS devices; ESD performance; ESD robustness; IT1 scalability; SBLKed drain fingers; area-efficient technique; drain-extended transistors; intrinsically nonscalable breakdown current behavior; isolated DEMOS devices; kirk effect-induced snapback; parasitic NPN; Electrostatic discharges; Immune system; Logic gates; Thumb; Transistors; DEMOS; EDMOS; ESD; LDMOS; kirk effect; self protection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium, 2014 IEEE International
Conference_Location :
Waikoloa, HI
Type :
conf
DOI :
10.1109/IRPS.2014.6860650
Filename :
6860650
Link To Document :
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