The RTN measurement technique on leakage path finding in advanced high-k metal gate CMOS devices

Author

Hsieh, E.R. ; Lu, P.Y. ; Chung, Steve S. ; Ke, J.C. ; Yang, C.W. ; Tsai, C.T. ; Yew, T.R.

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2015

fDate

June 29 2015-July 2 2015

Firstpage

154

Lastpage

457

Abstract

In this paper, the evolution of BTI induced leakage paths has been evaluated by I_g-RTN technique and demonstrated on HK/MG CMOS devices. First, RTN measurement has been elaborated to identify the location of traps and their correlation to the leakage current. Then, the measured gate current transient can be used to analyze the formation of breakdown path. The results show that the evolution of leakage paths can be divided into three stages, i.e., (1) the early stage-only gate leakage and discrete RTN traps are observed, (2) the middle stage - the traps interacting with the percolation paths and exhibits a multi-level current-variation, and (3) the last stage - the formation of breakdown path. These findings provide useful information on the understanding of gate dielectric breakdown in high-k CMOS devices.

Keywords

CMOS integrated circuits; high-k dielectric thin films; leakage currents; semiconductor device measurement; semiconductor device noise; BTI induced leakage path; HK/MG CMOS devices; RTN measurement technique; bias temperature instability; gate current transient; gate dielectric breakdown; high-k CMOS devices; high-k metal gate CMOS devices; leakage current; leakage path finding; random telegraph noise; traps location; Decision support systems; Electric breakdown; Logic gates; MOSFET; Reliability; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the

Conference_Location

Hsinchu

Type

conf

DOI

10.1109/IPFA.2015.7224355

Filename

7224355